1. Field of the Invention
The present invention relates to an information handling system, and more particularly relates to an apparatus and method for handling a failed processor of a multiprocessor information handling system.
2. Background of the Related Art
Along with continuous improvement and development in the components of an information handling system, techniques for handling and restoring normal operations of hardware failures have also greatly advanced. With those conventional techniques, some failures may be fixed whereas certain techniques are nevertheless undesirably affected.
For the current information handling system techniques with multiple processors, an information handling system remains inoperable in the event of a primary central processor failure despite the fact that other central processors may still provide normal functionality. That is to say, the above issue persists regardless of how many central processors are implemented under the trend of the expanding number of processors.
In view of the above, there is a need for a solution for effectively handling a central processor failure of an information handling system.